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{ "id": 117197, "url": "http://patches.dpdk.org/api/covers/117197/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20220930080228.864681-1-zhoumin@loongson.cn/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220930080228.864681-1-zhoumin@loongson.cn>", "list_archive_url": "https://inbox.dpdk.org/dev/20220930080228.864681-1-zhoumin@loongson.cn", "date": "2022-09-30T08:02:21", "name": "[v7,0/7] Introduce support for LoongArch architecture", "submitter": { "id": 2394, "url": "http://patches.dpdk.org/api/people/2394/?format=api", "name": "zhoumin", "email": "zhoumin@loongson.cn" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20220930080228.864681-1-zhoumin@loongson.cn/mbox/", "series": [ { "id": 24929, "url": "http://patches.dpdk.org/api/series/24929/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24929", "date": "2022-09-30T08:02:22", "name": "Introduce support for LoongArch architecture", "version": 7, "mbox": "http://patches.dpdk.org/series/24929/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/117197/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 8CBFEA00C4;\n\tFri, 30 Sep 2022 10:02:59 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 9EA9D4280C;\n\tFri, 30 Sep 2022 10:02:47 +0200 (CEST)", "from loongson.cn (mail.loongson.cn [114.242.206.163])\n by mails.dpdk.org (Postfix) with ESMTP id DDA0341109\n for <dev@dpdk.org>; Fri, 30 Sep 2022 10:02:44 +0200 (CEST)", "from localhost.localdomain (unknown [10.2.5.185])\n by localhost.localdomain (Coremail) with SMTP id\n AQAAf8BxnmuUojZjOhskAA--.54564S2;\n Fri, 30 Sep 2022 16:02:31 +0800 (CST)" ], "From": "Min Zhou <zhoumin@loongson.cn>", "To": "thomas@monjalon.net, david.marchand@redhat.com,\n bruce.richardson@intel.com,\n anatoly.burakov@intel.com, qiming.yang@intel.com, Yuying.Zhang@intel.com,\n jgrajcia@cisco.com, konstantin.v.ananyev@yandex.ru, zhoumin@loongson.cn", "Cc": "dev@dpdk.org,\n\tmaobibo@loongson.cn", "Subject": "[PATCH v7 0/7] Introduce support for LoongArch architecture ", "Date": "Fri, 30 Sep 2022 16:02:21 +0800", "Message-Id": "<20220930080228.864681-1-zhoumin@loongson.cn>", "X-Mailer": "git-send-email 2.31.1", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-CM-TRANSID": "AQAAf8BxnmuUojZjOhskAA--.54564S2", "X-Coremail-Antispam": "1UD129KBjvJXoW3XF48GrWUKr1fWryDWw1kGrg_yoW7Zryxpr\n WDCF9xKa1xGrWxZr9Iva4jgFn5A3Z7Gw12gFyagryrCryIqw1DZr4xKr9xZFy7A34Utr10\n qr4fWw1UWF1UWaUanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUjbIjqfuFe4nvWSU5nxnvy2\n 9KBjDU0xBIdaVrnUUvcSsGvfC2KfnxnUUI43ZEXa7xR_UUUUUUUUU==", "X-CM-SenderInfo": "52kr3ztlq6z05rqj20fqof0/", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "Dear team,\n\nThe following patch set is intended to support DPDK running on LoongArch\narchitecture.\n\nLoongArch is the general processor architecture of Loongson Corporation\nand is a new RISC ISA, which is a bit like MIPS or RISC-V.\n\nThe online documents of LoongArch architecture are here:\n https://loongson.github.io/LoongArch-Documentation/README-EN.html\n\nThe latest build tools for LoongArch (binary) can be downloaded from:\n https://github.com/loongson/build-tools\n\nv7:\n - rebase the patchset on the main repository\n - add errno.h to rte_power_intrinsics.c according with\n commit 72b452c5f259\n\nv6:\n - place some blocks for LoongArch in a pseudo alphabetical order\n - remove some macros not used\n - update release notes in the correct format\n - remove some headers for LoongArch, including msclock, pflock and\n ticketlock, which are now non-arch specific\n - rename some helpers to make them more readable \n - remove some copied comments\n - force-set RTE_FORCE_INTRINSICS in config and remove non-arch\n specific implementations\n - fix format errors in meson file reported by check-meson.py\n - rebase the patchset on the main repository\n\nv5:\n - merge all patches for supporting LoongArch EAL into one patch\n - add LoongArch cross compilation document and update some documents\n related to architecture\n - remove vector stubs added for LoongArch in net/i40e and net/ixgbe\n - add LOONGARCH64 cross compilation job in github ci\n\nv4:\n - rebase the patchset on the main repository of version 22.07.0\n\nv3:\n - add URL for cross compile tool chain\n - remove rte_lpm_lsx.h which was a dummy vector implementation\n because there is already a scalar implementation, thanks to\n Michal Mazurek\n - modify the name of compiler for cross compiling\n - remove useless variable in meson.build\n\nv2:\n - use standard atomics of toolchain to implement\n atomic operations\n - implement spinlock based on standard atomics\n\nMin Zhou (7):\n eal/loongarch: support LoongArch architecture\n net/ixgbe: add vector stubs for LoongArch\n net/memif: set memfd syscall ID on LoongArch\n net/tap: set BPF syscall ID for LoongArch\n examples/l3fwd: enable LoongArch operation\n test/cpuflags: add test for LoongArch cpu flag\n ci: add LOONGARCH64 cross compilation job\n\n .ci/linux-build.sh | 10 ++\n .github/workflows/build.yml | 10 +-\n MAINTAINERS | 6 ++\n app/test/test_cpuflags.c | 41 ++++++++\n app/test/test_xmmt_ops.h | 12 +++\n .../loongarch/loongarch_loongarch64_linux_gcc | 16 ++++\n config/loongarch/meson.build | 43 +++++++++\n doc/guides/contributing/design.rst | 2 +-\n .../cross_build_dpdk_for_loongarch.rst | 87 +++++++++++++++++\n doc/guides/linux_gsg/index.rst | 1 +\n doc/guides/nics/features.rst | 8 ++\n doc/guides/nics/features/default.ini | 1 +\n doc/guides/nics/features/ixgbe.ini | 1 +\n doc/guides/rel_notes/release_22_11.rst | 7 ++\n drivers/net/i40e/meson.build | 6 ++\n drivers/net/ixgbe/ixgbe_rxtx.c | 7 +-\n drivers/net/memif/rte_eth_memif.h | 2 +\n drivers/net/tap/tap_bpf.h | 2 +\n examples/l3fwd/l3fwd_em.c | 8 ++\n lib/eal/linux/eal_memory.c | 4 +\n lib/eal/loongarch/include/meson.build | 18 ++++\n lib/eal/loongarch/include/rte_atomic.h | 47 ++++++++++\n lib/eal/loongarch/include/rte_byteorder.h | 40 ++++++++\n lib/eal/loongarch/include/rte_cpuflags.h | 39 ++++++++\n lib/eal/loongarch/include/rte_cycles.h | 47 ++++++++++\n lib/eal/loongarch/include/rte_io.h | 18 ++++\n lib/eal/loongarch/include/rte_memcpy.h | 61 ++++++++++++\n lib/eal/loongarch/include/rte_pause.h | 24 +++++\n .../loongarch/include/rte_power_intrinsics.h | 20 ++++\n lib/eal/loongarch/include/rte_prefetch.h | 47 ++++++++++\n lib/eal/loongarch/include/rte_rwlock.h | 42 +++++++++\n lib/eal/loongarch/include/rte_spinlock.h | 64 +++++++++++++\n lib/eal/loongarch/include/rte_vect.h | 65 +++++++++++++\n lib/eal/loongarch/meson.build | 11 +++\n lib/eal/loongarch/rte_cpuflags.c | 93 +++++++++++++++++++\n lib/eal/loongarch/rte_cycles.c | 45 +++++++++\n lib/eal/loongarch/rte_hypervisor.c | 11 +++\n lib/eal/loongarch/rte_power_intrinsics.c | 53 +++++++++++\n meson.build | 2 +\n 39 files changed, 1017 insertions(+), 4 deletions(-)\n create mode 100644 config/loongarch/loongarch_loongarch64_linux_gcc\n create mode 100644 config/loongarch/meson.build\n create mode 100644 doc/guides/linux_gsg/cross_build_dpdk_for_loongarch.rst\n create mode 100644 lib/eal/loongarch/include/meson.build\n create mode 100644 lib/eal/loongarch/include/rte_atomic.h\n create mode 100644 lib/eal/loongarch/include/rte_byteorder.h\n create mode 100644 lib/eal/loongarch/include/rte_cpuflags.h\n create mode 100644 lib/eal/loongarch/include/rte_cycles.h\n create mode 100644 lib/eal/loongarch/include/rte_io.h\n create mode 100644 lib/eal/loongarch/include/rte_memcpy.h\n create mode 100644 lib/eal/loongarch/include/rte_pause.h\n create mode 100644 lib/eal/loongarch/include/rte_power_intrinsics.h\n create mode 100644 lib/eal/loongarch/include/rte_prefetch.h\n create mode 100644 lib/eal/loongarch/include/rte_rwlock.h\n create mode 100644 lib/eal/loongarch/include/rte_spinlock.h\n create mode 100644 lib/eal/loongarch/include/rte_vect.h\n create mode 100644 lib/eal/loongarch/meson.build\n create mode 100644 lib/eal/loongarch/rte_cpuflags.c\n create mode 100644 lib/eal/loongarch/rte_cycles.c\n create mode 100644 lib/eal/loongarch/rte_hypervisor.c\n create mode 100644 lib/eal/loongarch/rte_power_intrinsics.c" }