Cover Detail
Show a cover letter.
GET /api/covers/116738/?format=api
{ "id": 116738, "url": "http://patches.dpdk.org/api/covers/116738/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20220923144334.27736-1-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220923144334.27736-1-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220923144334.27736-1-suanmingm@nvidia.com", "date": "2022-09-23T14:43:07", "name": "[00/27] net/mlx5: HW steering PMD update", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20220923144334.27736-1-suanmingm@nvidia.com/mbox/", "series": [ { "id": 24805, "url": "http://patches.dpdk.org/api/series/24805/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=24805", "date": "2022-09-23T14:43:07", "name": "net/mlx5: HW steering PMD update", "version": 1, "mbox": "http://patches.dpdk.org/series/24805/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/116738/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 2BF45A054A;\n\tFri, 23 Sep 2022 16:44:04 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 0AC7440156;\n\tFri, 23 Sep 2022 16:44:04 +0200 (CEST)", "from NAM02-BN1-obe.outbound.protection.outlook.com\n (mail-bn1nam07on2087.outbound.protection.outlook.com [40.107.212.87])\n by mails.dpdk.org (Postfix) with ESMTP id 366334003F\n for <dev@dpdk.org>; Fri, 23 Sep 2022 16:44:03 +0200 (CEST)", "from DM6PR11CA0029.namprd11.prod.outlook.com (2603:10b6:5:190::42)\n by BL0PR12MB4849.namprd12.prod.outlook.com (2603:10b6:208:1c2::17) with\n Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.20; Fri, 23 Sep\n 2022 14:44:01 +0000", "from DM6NAM11FT052.eop-nam11.prod.protection.outlook.com\n (2603:10b6:5:190:cafe::8a) by DM6PR11CA0029.outlook.office365.com\n (2603:10b6:5:190::42) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.5654.20 via Frontend\n Transport; Fri, 23 Sep 2022 14:44:01 +0000", "from mail.nvidia.com (216.228.117.160) by\n DM6NAM11FT052.mail.protection.outlook.com (10.13.172.111) with Microsoft SMTP\n Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.5654.14 via Frontend Transport; Fri, 23 Sep 2022 14:44:01 +0000", "from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com\n (10.129.200.66) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.26; Fri, 23 Sep\n 2022 07:43:48 -0700", "from nvidia.com (10.126.231.35) by rnnvmail201.nvidia.com\n (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.986.29; Fri, 23 Sep\n 2022 07:43:47 -0700" ], "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none;\n b=ivHt5O3ptDH3J6sW9Ebk/s5P1c9LRhrRwTzxQ09ABD4xyFV9lQzqnIHz1i1kSg4n7AdCDHX3hPcSWDKCh/s1NKC/BPqZdCdHtW475yIGtTAg709Sir3nit/tVH3z93izr6SgglFro3cjokYC4gPrhxhNkeeuRLYszHDPpAy1oW9TYqKdPFrZGbTsxxfe6ZuHE5Xl+SPxkGR4yp1GcqMguEQeAQDMBvTVB/86h0MGmo90RVKPFC9IfSymAOiHNbtcsthF3i28/PnP8pmUycMxjWdrTINKfO2TUMM7PxdZm//9FdK0KcJmL25/hGIIMHAhWlOs+QvTvHUN+XLRhQDmxQ==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector9901;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=ZYUXITw8Doeey768sTKx4/LZNNywaC8AtIzcAxfHty8=;\n b=jtnuL1DDmSEfBfKexT2Oud6mwuztxIAbni9ZN1xD1DASnfuwRQN2UJw153OkWWExTeoZYTrjNvj/5/nS+vqftq4Ojaz0o1rh15s7LlkaP2f5KotJXgHjC1d8ERZ3lJLHuv5IMA0ghjxSlJDujiXdnVbFf70IcJmFFlStoTjJL8EJbbBoQmlS6aw8Nw788PiEOSNIQr/f/j79mqxvGf26rjHgq1aDn4ZEvmtxVe6FmKhTLm1QTFnSROYDxKYZlC4zFGDJg4+IkgjP3dkvuHH7Ls57Vcj6zAxI6hiMQti+tv9cZVtaIPMnLSpbmaAwvJJWQIkP7D+Ta7rme8HMqfRe1A==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 216.228.117.160) smtp.rcpttodomain=dpdk.org smtp.mailfrom=nvidia.com;\n dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com;\n dkim=none (message not signed); arc=none", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com;\n s=selector2;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=ZYUXITw8Doeey768sTKx4/LZNNywaC8AtIzcAxfHty8=;\n b=aOD6AprFKUSakU3ySuixYcgfGlXrc0m1aVEE3Un2VBtD24eViKsr57CHXjzkf8Eoina2oAaR0k+3jqRe09zNKtECmfAWDfWbJfIV94DynZSVhsJOFrfUMrgudMqS5xGJMHg3TNMsF5LL4XVlQwcurM8JIyQX0uB87eDFQ93QQhhGSymkCGeifmrgd/g6JhMN+3p7w8/2wLZ/BNdpXLmR0DT6z+fHU6yqBnQCbsT52Z2m173+7ozKgRDwKfnqeHYItTnWmJjVtwCR06LvZatY0LrIJGLJfCF13gGKkgiM5A/PZDPbITduhAjdMeo+1IzCVJ19azs3mcpi2vp2AbX8LA==", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 216.228.117.160)\n smtp.mailfrom=nvidia.com;\n dkim=none (message not signed)\n header.d=none;dmarc=pass action=none header.from=nvidia.com;", "Received-SPF": "Pass (protection.outlook.com: domain of nvidia.com designates\n 216.228.117.160 as permitted sender) receiver=protection.outlook.com;\n client-ip=216.228.117.160; helo=mail.nvidia.com; pr=C", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "", "CC": "<dev@dpdk.org>", "Subject": "[PATCH 00/27] net/mlx5: HW steering PMD update", "Date": "Fri, 23 Sep 2022 17:43:07 +0300", "Message-ID": "<20220923144334.27736-1-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail201.nvidia.com (10.129.68.8) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "DM6NAM11FT052:EE_|BL0PR12MB4849:EE_", "X-MS-Office365-Filtering-Correlation-Id": "ecf1f941-efa7-4245-f026-08da9d720e1d", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 9030ddVgzCE4t4x6dobBbh0W4CnqQUIg2/6ZRsZ0n7lV6D8MJXccB3NLwtPg8DrLQRzWVqfoF5IHRBGXfSg/VBnheMffdHdoSLoi+HSnHvBaLQ2IiO9P7DRwGXtoszC4oSkCezaQy82uZxyilXjDANjMY62oxo41u6gfWpawQRKusmpxlczzqIHOn/v+zGWaqkjWxdMhoSg7bfrz2blkdmazIaVop0QGgT85MVYPUIsZ4vGDLXqDxDjiQVeNqUUuyFl8/FdbQsd4B+aA1++zL22Z/KiChqViA5cOeEjBIxYaqpn0aRieVKB2sMAimPHvkLg4FtugmbvWq0Ed3Y81z8v8vRgHqNR1WMSROeTdVY3EZ+d1FKux8c4NIc1P1j5fIanrylOptQjh1fDr3CL9pi+NHoNuMU57L+JYOL6TuNws5e0tfUrH+weLXRiMg3jyM3oyeBaeUI832eAMfXTJOzzRY94Q0+E8QttHb5MGqWpOOfKKGzKM7OMc/D3pCPvLmmbKrQEyOU0Bl8BhpgJGkqL/RvSNEw6Lv3t2yAGCangaHM6wvQ0+wO1kliTXWRJsyFE4SMvsEKBPDKICKnRanBZ14nbX+5g06hnwA0lmHehkjmtEJDj/2az7nWygHrlOFo6Jb9hChCINB2FllADTQHDFBLhaeepp2oY65kYpQNUS7EtMjR1Yzn45wHMOVbo4daKeZjQJgyiGdIghbyK8REfyxUU5BfjK+BA7+IuBsP6xTn6NhovGF2cxeFDJIKiZb18LwtxYkqHqjCtJlvb7x9FNJH9GBhlOr6d7+ulFCaBZ3iO1hN+PXB2ZMRsXPdB6Htx5F8h8uXKgEGsZf/1n+CSj5UQBwTtUWDHpC5f3fhjh2XJCjX5Y8t3Pknmw59lb", "X-Forefront-Antispam-Report": "CIP:216.228.117.160; CTRY:US; LANG:en; SCL:1;\n SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge1.nvidia.com; CAT:NONE;\n SFS:(13230022)(4636009)(39860400002)(136003)(346002)(396003)(376002)(451199015)(46966006)(40470700004)(36840700001)(15650500001)(26005)(36860700001)(6286002)(8676002)(4326008)(70206006)(36756003)(316002)(70586007)(40460700003)(41300700001)(109986005)(6666004)(86362001)(8936002)(5660300002)(55016003)(7696005)(40480700001)(356005)(82310400005)(16526019)(336012)(82740400003)(7636003)(83380400001)(2616005)(1076003)(186003)(426003)(47076005)(478600001)(2906002)(266003);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "23 Sep 2022 14:44:01.3459 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n ecf1f941-efa7-4245-f026-08da9d720e1d", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.160];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT052.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BL0PR12MB4849", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "The skeleton of mlx5 HW steering(HWS) has been updated into\nupstream for pretty a long time, but not updated anymore due\nto missing of the low-level steering layer code. Luckily,\nbetter late than never, the steering layer finnaly comes[1].\n\nThis series will add more features to the existing PMD code:\n - FDB and metadata copy.\n - Modify field.\n - Meter.\n - Counter.\n - Aging.\n - Action template pre-parser optimization.\n - Connection tracking.\n\n\nSome features such as meter/aging/ct touches the public API,\nand public API changes have been sent to ML much earily in\nother threads in order not to be swallowed by this big series.\n\nThe dpends patches as below:\n [1]https://patches.dpdk.org/project/dpdk/cover/20220922190345.394-1-valex@nvidia.com/\n [2]https://patches.dpdk.org/project/dpdk/cover/20220921021133.2982954-1-akozyrev@nvidia.com/\n [3]https://patches.dpdk.org/project/dpdk/cover/20220921145409.511328-1-michaelba@nvidia.com/\n [4]https://patches.dpdk.org/project/dpdk/patch/20220920071036.20878-1-suanmingm@nvidia.com/\n [5]https://patches.dpdk.org/project/dpdk/patch/20220920071141.21769-1-suanmingm@nvidia.com/\n [6]https://patches.dpdk.org/project/dpdk/patch/20220921143202.1790802-1-dsosnowski@nvidia.com/\n\n\nAlexander Kozyrev (7):\n ethdev: add meter profiles/policies config\n net/mlx5: add HW steering meter action\n net/mlx5: add meter color flow matching in dv\n net/mlx5: add meter color flow matching in hws\n net/mlx5: implement profile/policy get\n net/mlx5: implement METER MARK action for HWS\n net/mlx5: implement METER MARK indirect action for HWS\n\nBing Zhao (3):\n net/mlx5: enable mark flag for all ports in the same domain\n net/mlx5: add extended metadata mode for hardware steering\n net/mlx5: add support for ASO return register\n\nDariusz Sosnowski (5):\n net/mlx5: validate modify field action template\n net/mlx5: create port actions\n net/mlx5: support DR action template API\n net/mlx5: add pattern and table attribute validation\n net/mlx5: add meta item support in egress\n\nGregory Etelson (1):\n net/mlx5: add HW steering VLAN push, pop and VID modify flow actions\n\nSuanming Mou (8):\n net/mlx5: fix invalid flow attributes\n net/mlx5: fix IPv6 and TCP RSS hash fields\n net/mlx5: add shared header reformat support\n net/mlx5: add modify field hws support\n net/mlx5: support caching queue action\n net/mlx5: fix indirect action validate\n lib/ethdev: add connection tracking configuration\n net/mlx5: add HW steering connection tracking support\n\nXiaoyu Min (3):\n net/mlx5: add HW steering counter action\n net/mlx5: update indirect actions ops to HW variation\n net/mlx5: support indirect count action for HW steering\n\n doc/guides/nics/mlx5.rst | 9 +\n drivers/common/mlx5/mlx5_devx_cmds.c | 50 +\n drivers/common/mlx5/mlx5_devx_cmds.h | 27 +\n drivers/common/mlx5/mlx5_prm.h | 21 +-\n drivers/common/mlx5/version.map | 1 +\n drivers/net/mlx5/linux/mlx5_os.c | 41 +-\n drivers/net/mlx5/meson.build | 1 +\n drivers/net/mlx5/mlx5.c | 39 +-\n drivers/net/mlx5/mlx5.h | 160 +-\n drivers/net/mlx5/mlx5_defs.h | 2 +\n drivers/net/mlx5/mlx5_flow.c | 247 +-\n drivers/net/mlx5/mlx5_flow.h | 265 +-\n drivers/net/mlx5/mlx5_flow_aso.c | 313 +-\n drivers/net/mlx5/mlx5_flow_dv.c | 840 ++--\n drivers/net/mlx5/mlx5_flow_hw.c | 5434 +++++++++++++++++++++++---\n drivers/net/mlx5/mlx5_flow_meter.c | 967 ++++-\n drivers/net/mlx5/mlx5_flow_verbs.c | 4 +-\n drivers/net/mlx5/mlx5_hws_cnt.c | 523 +++\n drivers/net/mlx5/mlx5_hws_cnt.h | 558 +++\n drivers/net/mlx5/mlx5_trigger.c | 80 +-\n lib/ethdev/rte_flow.h | 27 +-\n 21 files changed, 8556 insertions(+), 1053 deletions(-)\n create mode 100644 drivers/net/mlx5/mlx5_hws_cnt.c\n create mode 100644 drivers/net/mlx5/mlx5_hws_cnt.h" }