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{ "id": 111570, "url": "http://patches.dpdk.org/api/covers/111570/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20220522055900.417282-1-spiked@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220522055900.417282-1-spiked@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220522055900.417282-1-spiked@nvidia.com", "date": "2022-05-22T05:58:53", "name": "[RFC,v2,0/7] introduce per-queue limit watermark and host shaper", "submitter": { "id": 2637, "url": "http://patches.dpdk.org/api/people/2637/?format=api", "name": "Spike Du", "email": "spiked@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20220522055900.417282-1-spiked@nvidia.com/mbox/", "series": [ { "id": 23078, "url": "http://patches.dpdk.org/api/series/23078/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=23078", "date": "2022-05-22T05:58:53", "name": "introduce per-queue limit watermark and host shaper", "version": 2, "mbox": "http://patches.dpdk.org/series/23078/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/111570/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 99D34A034C;\n\tSun, 22 May 2022 07:59:28 +0200 (CEST)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id 3D63540156;\n\tSun, 22 May 2022 07:59:28 +0200 (CEST)", "from NAM10-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam10on2060.outbound.protection.outlook.com [40.107.93.60])\n by mails.dpdk.org (Postfix) with ESMTP id C9FDF40040\n for <dev@dpdk.org>; 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helo=mail.nvidia.com; pr=C", "From": "Spike Du <spiked@nvidia.com>", "To": "<matan@nvidia.com>, <viacheslavo@nvidia.com>, <orika@nvidia.com>,\n <thomas@monjalon.net>", "CC": "<dev@dpdk.org>, <rasland@nvidia.com>", "Subject": "[RFC v2 0/7] introduce per-queue limit watermark and host shaper", "Date": "Sun, 22 May 2022 08:58:53 +0300", "Message-ID": "<20220522055900.417282-1-spiked@nvidia.com>", "X-Mailer": "git-send-email 2.27.0", "In-Reply-To": "<20220506035645.4101714-1-spiked@nvidia.com>", "References": "<20220506035645.4101714-1-spiked@nvidia.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.231.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "b4e295c5-b8d5-44fc-0979-08da3bb83633", "X-MS-TrafficTypeDiagnostic": "BN9PR12MB5196:EE_", "X-LD-Processed": "43083d15-7273-40c1-b7db-39efd9ccc17a,ExtAddr", "X-Microsoft-Antispam-PRVS": "\n <BN9PR12MB519663D69B003DAFF3AE8F2CA8D59@BN9PR12MB5196.namprd12.prod.outlook.com>", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n 7Kg0uDV/6UN+JQmvsMecToklKGW/+gNRlTxxnaCJMN5nIsmX9O1I8/LeV8KllXuMzYlQO3T1gcEE2O4dSydF8AtDoYyhrj7D96QBwoLY13ZomOU/okiqykTNOk8e9FCBOx1+PyT/YPfC2Pl+2PhI7+E/MDDQQPR58caAEMgolKPQoWB86o6ezd5x35ZqAqk0bCv4aULVvgFKYUslmuE08lYLfYcQrZcpZNJj2Hes8nTsRAMW7DayNx/RHCic0UTKU+BMShk2xAZp7LR8Wc2lqR+Fm6uL0EHEKxuFrt4jbCpliJZUqVF/FFcBUBQIKBmCbUh6JAh6O6luAwWWAB2P2PQZHFxoU3e/xnQ+pb9AqOZtzUp51RzEGb9nGIM3u/mVepPro0VXryaDqxIw7F11i7Mu4qDboTaHlXevO5RyWsrRF+E+nWDwpQzfJN1fQzshY/A9BwprYFWSPax5eliPp4ezpy0zRNvQrkLErfVUB1wV1YS3NbYw/NjPVTD5YgWdIbd4TJkBmtY4Y68dNfixa2xr9cMCBH/SGNlmso+A91cFmp2pg5sRv8hgNHvTSxhJKXZ2h1r/uyxLVvToKdBkdm3n75EZXtwzjqYhjWInVWAktbEWW8HXxjTE3Y5amf+LLPwLxaj4p/i3CtRCGXpVhhn/urTOxB7R2FhiHIMhcU9/zEKrX7L+jfT3DskgKNpjzQrF3uPrE0zZphhKuNsViA==", "X-Forefront-Antispam-Report": "CIP:12.22.5.234; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(13230001)(4636009)(36840700001)(40470700004)(46966006)(5660300002)(70586007)(70206006)(81166007)(8676002)(4326008)(356005)(36756003)(36860700001)(82310400005)(6666004)(2906002)(8936002)(7696005)(316002)(426003)(336012)(47076005)(86362001)(107886003)(2616005)(55016003)(40460700003)(508600001)(6286002)(26005)(110136005)(186003)(54906003)(16526019)(1076003)(83380400001)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "22 May 2022 05:59:19.4588 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n b4e295c5-b8d5-44fc-0979-08da3bb83633", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.234];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CO1NAM11FT028.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "BN9PR12MB5196", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "LWM(limit watermark) is per RX queue attribute, when RX queue fullness reach the LWM limit, HW sends an event to dpdk application.\nHost shaper can configure shaper rate and lwm-triggered for a host port.\nThe shaper limits the rate of traffic from host port to wire port.\nIf lwm-triggered is enabled, a 100Mbps shaper is enabled automatically when one of the host port's Rx queues receives LWM event.\n\nThese two features can combine to control traffic from host port to wire port.\nThe work flow is configure LWM to RX queue and enable lwm-triggered flag in host shaper, after receiving LWM event, delay a while until RX queue is empty , then disable the shaper. We recycle this work flow to reduce RX queue drops.\n\nAdd new libethdev API to set LWM, add rte event RTE_ETH_EVENT_RXQ_LIMIT_REACHED to handle LWM event. For host shaper, because it doesn't align to existing DPDK framework and is specific to Nvidia NIC, use PMD private API.\n\nFor integration with testpmd, put the private cmdline function and LWM event handler in mlx5 PMD directory by adding a new file mlx5_test.c. Only add minimal code in testpmd to invoke interfaces from mlx5_test.c.\n\nSpike Du (7):\n net/mlx5: add LWM support for Rxq\n common/mlx5: share interrupt management\n ethdev: introduce Rx queue based limit watermark\n net/mlx5: add LWM event handling support\n net/mlx5: support Rx queue based limit watermark\n net/mlx5: add private API to config host port shaper\n app/testpmd: add LWM and Host Shaper command\n\n app/test-pmd/cmdline.c | 74 +++++\n app/test-pmd/config.c | 23 ++\n app/test-pmd/meson.build | 4 +\n app/test-pmd/testpmd.c | 24 ++\n app/test-pmd/testpmd.h | 1 +\n doc/guides/nics/mlx5.rst | 84 ++++++\n doc/guides/rel_notes/release_22_07.rst | 2 +\n drivers/common/mlx5/linux/meson.build | 13 +\n drivers/common/mlx5/linux/mlx5_common_os.c | 131 +++++++++\n drivers/common/mlx5/linux/mlx5_common_os.h | 11 +\n drivers/common/mlx5/mlx5_prm.h | 26 ++\n drivers/common/mlx5/version.map | 2 +\n drivers/common/mlx5/windows/mlx5_common_os.h | 24 ++\n drivers/net/mlx5/linux/mlx5_ethdev_os.c | 71 -----\n drivers/net/mlx5/linux/mlx5_os.c | 132 ++-------\n drivers/net/mlx5/linux/mlx5_socket.c | 53 +---\n drivers/net/mlx5/mlx5.c | 68 +++++\n drivers/net/mlx5/mlx5.h | 12 +-\n drivers/net/mlx5/mlx5_devx.c | 60 +++-\n drivers/net/mlx5/mlx5_devx.h | 1 +\n drivers/net/mlx5/mlx5_rx.c | 292 +++++++++++++++++++\n drivers/net/mlx5/mlx5_rx.h | 13 +\n drivers/net/mlx5/mlx5_testpmd.c | 184 ++++++++++++\n drivers/net/mlx5/mlx5_testpmd.h | 27 ++\n drivers/net/mlx5/mlx5_txpp.c | 28 +-\n drivers/net/mlx5/rte_pmd_mlx5.h | 30 ++\n drivers/net/mlx5/version.map | 2 +\n drivers/net/mlx5/windows/mlx5_ethdev_os.c | 22 --\n drivers/vdpa/mlx5/mlx5_vdpa_virtq.c | 48 +--\n lib/ethdev/ethdev_driver.h | 22 ++\n lib/ethdev/rte_ethdev.c | 52 ++++\n lib/ethdev/rte_ethdev.h | 74 ++++-\n lib/ethdev/version.map | 4 +\n 33 files changed, 1305 insertions(+), 309 deletions(-)\n create mode 100644 drivers/net/mlx5/mlx5_testpmd.c\n create mode 100644 drivers/net/mlx5/mlx5_testpmd.h" }