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{ "id": 107285, "url": "http://patches.dpdk.org/api/covers/107285/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/cover/20220210162926.20436-1-suanmingm@nvidia.com/", "project": { "id": 1, "url": "http://patches.dpdk.org/api/projects/1/?format=api", "name": "DPDK", "link_name": "dpdk", "list_id": "dev.dpdk.org", "list_email": "dev@dpdk.org", "web_url": "http://core.dpdk.org", "scm_url": "git://dpdk.org/dpdk", "webscm_url": "http://git.dpdk.org/dpdk", "list_archive_url": "https://inbox.dpdk.org/dev", "list_archive_url_format": "https://inbox.dpdk.org/dev/{}", "commit_url_format": "" }, "msgid": "<20220210162926.20436-1-suanmingm@nvidia.com>", "list_archive_url": "https://inbox.dpdk.org/dev/20220210162926.20436-1-suanmingm@nvidia.com", "date": "2022-02-10T16:29:13", "name": "[00/13] net/mlx5: add hardware steering", "submitter": { "id": 1887, "url": "http://patches.dpdk.org/api/people/1887/?format=api", "name": "Suanming Mou", "email": "suanmingm@nvidia.com" }, "mbox": "http://patches.dpdk.org/project/dpdk/cover/20220210162926.20436-1-suanmingm@nvidia.com/mbox/", "series": [ { "id": 21609, "url": "http://patches.dpdk.org/api/series/21609/?format=api", "web_url": "http://patches.dpdk.org/project/dpdk/list/?series=21609", "date": "2022-02-10T16:29:13", "name": "net/mlx5: add hardware steering", "version": 1, "mbox": "http://patches.dpdk.org/series/21609/mbox/" } ], "comments": "http://patches.dpdk.org/api/covers/107285/comments/", "headers": { "Return-Path": "<dev-bounces@dpdk.org>", "X-Original-To": "patchwork@inbox.dpdk.org", "Delivered-To": "patchwork@inbox.dpdk.org", "Received": [ "from mails.dpdk.org (mails.dpdk.org [217.70.189.124])\n\tby inbox.dpdk.org (Postfix) with ESMTP id 52996A00BE;\n\tThu, 10 Feb 2022 17:29:55 +0100 (CET)", "from [217.70.189.124] (localhost [127.0.0.1])\n\tby mails.dpdk.org (Postfix) with ESMTP id CDAF341144;\n\tThu, 10 Feb 2022 17:29:54 +0100 (CET)", "from NAM04-DM6-obe.outbound.protection.outlook.com\n (mail-dm6nam08on2088.outbound.protection.outlook.com [40.107.102.88])\n by mails.dpdk.org (Postfix) with ESMTP id E211941141\n for <dev@dpdk.org>; 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helo=mail.nvidia.com;", "From": "Suanming Mou <suanmingm@nvidia.com>", "To": "<viacheslavo@nvidia.com>, <matan@nvidia.com>", "CC": "<rasland@nvidia.com>, <orika@nvidia.com>, <dev@dpdk.org>", "Subject": "[PATCH 00/13] net/mlx5: add hardware steering", "Date": "Thu, 10 Feb 2022 18:29:13 +0200", "Message-ID": "<20220210162926.20436-1-suanmingm@nvidia.com>", "X-Mailer": "git-send-email 2.18.1", "MIME-Version": "1.0", "Content-Type": "text/plain", "X-Originating-IP": "[10.126.230.35]", "X-ClientProxiedBy": "rnnvmail203.nvidia.com (10.129.68.9) To\n rnnvmail201.nvidia.com (10.129.68.8)", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-Office365-Filtering-Correlation-Id": "40b3afd4-efb9-4f8c-e057-08d9ecb28fbf", "X-MS-TrafficTypeDiagnostic": "CH2PR12MB3848:EE_", "X-Microsoft-Antispam-PRVS": "\n <CH2PR12MB384806E099061F42C7EB68AFC12F9@CH2PR12MB3848.namprd12.prod.outlook.com>", "X-MS-Oob-TLC-OOBClassifiers": "OLM:8882;", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;", "X-Microsoft-Antispam-Message-Info": "\n ZEG3Cvo+wzfGTAJUBTVl/foBTPX415MFPUNLJGpRvoRadmIZgOxytmHiturEKDxK1s6RIIGRz8GE3f+Smg2usp0wSiVR/BV2KXLjjWo3ROi7ytMS+MR335atUtDS5bATn6PeoSY6izgt9lYpKWMc9dpA1CZBerTnhsldF4/xh5gTf1YSDXF9Ei3lVpvRT0CmqfcfwyoFigSMhT9wEiDZjGAnuGPtrI+HC6Q0Q+dslBYx+F7FNGEQiTh8UjtR8Db0utcMt7HtjUB5mjRga7CgtYDAiDroNsq8j76pqHlQt3RPNL+TnVcSctD0K1y0dAKzxKcEUhxQ/0uIbsQDVzt8iPzpZeo0UZntsxfs907p1kiOWqLpXB1AJWlbNMqwBmDzp+gq776MelTwU4O1XWgenpOnScIiMfqxeALRtGMC+RpDaiLzBfzXRJXpsmEv7zmn2+fIzLHwo05d8AbKyWkRP3qr9K4mzKiimCLlDKGX6Emotgskyi/1BXASS/wwUvULSqCFcKGMeDrqLHcRgPx2Jl/yzCacmxNJBohAZ7z+9P6E9W9koaMQyxr7QUaHwmy/jfto7HmJWjCi5E5k5gP7bYxde9LJXpQ5hzs3eNMnC9lLUjuVxnk51CQjaqFybtzOxe0F/5Sz6p+FYO2O4V2oiSFjSvkxOJPO0i0j3wszlgC7jP55h0stUsBWmEe8LzPSxM3BQ50AHh3mSWH7Ar9Iow==", "X-Forefront-Antispam-Report": "CIP:12.22.5.238; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:CAL; SFV:NSPM; H:mail.nvidia.com; PTR:InfoNoRecords; CAT:NONE;\n SFS:(13230001)(4636009)(40470700004)(36840700001)(46966006)(55016003)(47076005)(36860700001)(86362001)(82310400004)(40460700003)(6666004)(8936002)(5660300002)(70206006)(110136005)(54906003)(6636002)(316002)(4326008)(8676002)(508600001)(356005)(70586007)(16526019)(1076003)(83380400001)(2906002)(6286002)(426003)(336012)(26005)(186003)(7696005)(2616005)(81166007)(36756003)(36900700001);\n DIR:OUT; SFP:1101;", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "10 Feb 2022 16:29:50.8592 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 40b3afd4-efb9-4f8c-e057-08d9ecb28fbf", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[12.22.5.238];\n Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n DM6NAM11FT030.eop-nam11.prod.protection.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH2PR12MB3848", "X-BeenThere": "dev@dpdk.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "DPDK patches and discussions <dev.dpdk.org>", "List-Unsubscribe": "<https://mails.dpdk.org/options/dev>,\n <mailto:dev-request@dpdk.org?subject=unsubscribe>", "List-Archive": "<http://mails.dpdk.org/archives/dev/>", "List-Post": "<mailto:dev@dpdk.org>", "List-Help": "<mailto:dev-request@dpdk.org?subject=help>", "List-Subscribe": "<https://mails.dpdk.org/listinfo/dev>,\n <mailto:dev-request@dpdk.org?subject=subscribe>", "Errors-To": "dev-bounces@dpdk.org" }, "content": "As the new queue-based flow rules management mechanism is introduced\nto the rte_flow. A new steering mode PMD code is also developed to\ntake advantage of the new API.\n\nThe HW steering prepares the required flow resources in advanced from\nthe hints when create template table. That means the matcher and most\nof the actions have been prepared during flow table creation. Limited\nleft actions will be constructed during flow creation if needed.\n\nA flow postpone attribute bit describes if flow creation/destruction\nshould be applied to the HW directly or not. An extra push function\nhas also been prepared to force push all the enqueued flows to HW.\n\nOnce the flow has been applied to the HW, the pull function will be\ncalled to get the enqueued creation/destruction flows.\n\nThe asynchronous flow creation and destruction are handled by queue\njobs. The queue job descriptor is currently introduced to convey the\nflow information and operation type between the flow management in\nin pull function.\n\nFlow rule memory is allocated in PMD layer instead of allocating from\nHW layer. While destroying the flow, the flow rule memory can only be\nfreed after the event received.\n\n*** THIS PATCH SET DEPENDS ON THE NEW RTE_FLOW API ***\n\n\nSuanming Mou (13):\n net/mlx5: introduce hardware steering operation\n net/mlx5: introduce hardware steering enable routine\n net/mlx5: add port flow configuration\n net/mlx5: add pattern template management\n net/mlx5: add action template management\n net/mlx5: add table management\n net/mlx5: add basic flow queue operation\n net/mlx5: add flow flush function\n net/mlx5: add flow jump action\n net/mlx5: add queue and RSS action\n net/mlx5: add mark action\n net/mlx5: add indirect action\n net/mlx5: add header reformat action\n\n drivers/net/mlx5/linux/mlx5_flow_os.h | 1 +\n drivers/net/mlx5/linux/mlx5_os.c | 22 +-\n drivers/net/mlx5/meson.build | 1 +\n drivers/net/mlx5/mlx5.c | 50 +-\n drivers/net/mlx5/mlx5.h | 63 +-\n drivers/net/mlx5/mlx5_devx.c | 10 +\n drivers/net/mlx5/mlx5_flow.c | 569 +++++-\n drivers/net/mlx5/mlx5_flow.h | 276 +++\n drivers/net/mlx5/mlx5_flow_dv.c | 175 +-\n drivers/net/mlx5/mlx5_flow_hw.c | 2284 +++++++++++++++++++++++++\n drivers/net/mlx5/mlx5_flow_verbs.c | 7 +-\n drivers/net/mlx5/mlx5_rx.h | 9 +-\n drivers/net/mlx5/mlx5_rxq.c | 78 +-\n 13 files changed, 3374 insertions(+), 171 deletions(-)\n create mode 100644 drivers/net/mlx5/mlx5_flow_hw.c" }